Stratix® 10 Configuration User Guide

ID 683762
Date 4/05/2024
Document Table of Contents

3.2.3. AS Using Multiple Serial Flash Devices

Stratix® 10 devices support one AS x4 flash memory device for AS configuration. Once the device enters user mode, you can then use up to four AS x4 flash memories with Mailbox Client Intel® FPGA IP or HPS as data storage. The MSEL pins operate as MSEL only during POR state. After SDM samples the MSEL pins during the boot ROM state for AS x4 mode, the SDM repurposes the MSEL pins as chip select pins. You must ensure appropriate chip select pin connections to the configuration AS x4 flash memory and the HPS AS x4 flash memory. Each flash device has a dedicated AS_nCSO pin but shares other pins.

Refer to the Stratix® 10 Device Family Pin Connection Guidelines for additional information about individual pin usage and requirements.

Refer to Command Sequence to Perform Quad SPI Operations for additional information about accessing multiple serial flash devices via Mailbox Client Intel® FPGA IP.

Figure 42. Connections for AS Configuration with Multiple Serial Flash Devices

The following table shows the maximum supported AS_CLK frequency for a range of capacitance loading values when using multiple flash devices. The maximum AS_CLK frequency also depends on whether you use the OSC_CLK_1 or internal oscillator as the clock source.

Table 34.  Maximum AS_CLK Frequency as a Function of Board Capacitance Loading and Clock Source
Capacitance Loading (pF) Maximum Supported AS_CLK (MHz)
OSC_CLK_1 (MHz) Internal Oscillator (MHz)
10 125 115
30 100 77
37 71.5 77
80 50 58
140 25 25