Intel® Agilex™ F-Series Transceiver-SoC Development Kit User Guide

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ID 683752
Date 6/21/2022
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3.4. Control on-board clock through Clock Controller GUI

The Clock Controller GUI application can change on-board Si549 programmable oscillators to any customized frequency between 0.2 MHz and 800 MHz. The default clock frequency value is 156.25MHz. It can also change both Si5338K programmable PLLs to any frequency between 0.17 MHz and 710 MHz.

To change LMK05028 input/output frequency plan, you should:
  1. Connect J51.2 to J26.19, J51.1 to J26.17 by duban wires, connect J26.12 to J26.11 by jumper. This set LMK05028 work at I2C mode and put it into I 2 C chain. Ensure SW10.2 is set to ON and SW4.4 is set to OFF.
  2. Generate the register file by using TICS Pro tools and MATLAB Runtime v9.0 (2015b, 64-bit).
  3. Import generated register file into on-board chip through Clock Controller GUI.

The Clock Controller GUI application (ClockControl.exe) runs as a stand-alone application and resides in the <package dir>\examples\board_test_system directory.

The Clock Controller GUI communicates with the system Intel® MAX® 10 device through either USB port CN1 or 10-pin JTAG header J19. Then system Intel® MAX® 10 controls these programmable clock parts through a 2-wire serial bus.

Attention: You cannot run the stand-alone Clock Controller GUI application when the Board Test System (BTS) or Power Monitor GUI is running at the same time.
Figure 2. Clock Controller GUI - Si549
Note:
  • LSDIV: Low Speed Output Divider
  • HSDIV: High Speed Output Divider
  • FBDIV: DSPLL™ Feedback Divider used to set Digital VCO Frequency
Figure 3. Clock Controller GUI - Si5338K

The following sections describe the Clock Controller GUI buttons.

Read: Reads the current frequency setting for the oscillator associated with the active tab.

Default: Sets the frequency for the oscillator associated with the active tab back to its default value. You can also return to the default frequencies by power cycling the board.

Set: Sets the programmable oscillator frequency for the selected clock to the value in the CLKx output controls for the Si5338. Frequency changes might take several milliseconds to take effect. You might see glitches on the clock during this time. Intel recommends resetting the FPGA logic after changing frequencies.

Import: Import the register file which is generated for new input/output frequency plan into the on-board LMK05028. Register changes are volatile after power recycle.
Figure 4. Clock Controller GUI - LMK05028

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