Intel® Agilex™ F-Series Transceiver-SoC Development Kit User Guide

ID 683752
Date 9/30/2022
Document Table of Contents

6.1. Add SmartVID settings in Intel® Quartus® Prime QSF file

Intel® Agilex™ silicon assembled on this development kit enables SmartVID feature by default. In order to avoid a Intel® Quartus® Prime from generating an error due to incomplete SmartVID settings, you must put constraints outlined below constraints into Intel® Quartus® Prime project QSF file. These constraints are designed for Intel® Enpirion® ED8401 core circuit.

Open your Intel® Quartus® Prime project QSF file, copy and paste constraint scripts into the file. Ensure that there are no other similar settings with different values.

set_global_assignment -name PWRMGT_BUS_SPEED_MODE "100 KHZ"
set_global_assignment -name PWRMGT_SLAVE_DEVICE0_ADDRESS 42
set_global_assignment -name PWRMGT_SLAVE_DEVICE1_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE2_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE3_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE4_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE5_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE6_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE7_ADDRESS 00

set_global_assignment -name USE_PWRMGT_SCL SDM_IO0
set_global_assignment -name USE_PWRMGT_SDA SDM_IO12
set_global_assignment -name USE_CONF_DONE SDM_IO16
set_global_assignment -name VID_OPERATION_MODE "PMBUS MASTER"

set_global_assignment -name PWRMGT_LINEAR_FORMAT_N "-13"

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