Intel Agilex® 7 FPGA F-Series Transceiver-SoC Development Kit User Guide

ID 683752
Date 4/21/2023
Public
Document Table of Contents

6.2. Golden Top

You can use the Golden Top project as the starting point for your designs. It comes loaded with constraints, pin locations, define I/O standard, direction and general termination. DDR4 pin termination settings are not included. Refer DDR4 example designs for details.