AN 957: Time-Sensitive Networking for Drive-on-Chip Design Example

ID 683707
Date 10/30/2021
Document Table of Contents

3.1. Changing File Names, Revision Name, and Target Device for the TSN Drive-on-Chip Design Example

  1. Change the name to differentiate the new project. For example, for the .qpf file DOC_TANDEM_CVSX_NIOS_TSN, as this variation of the project includes the drive-on-chip based on Nios II soft-processor and the TSN IP.
    You can also change the name of the .qsys file.
  2. In Intel Quartus Prime 17.0, navigate to File > Open Project and select the newly-named .qpf file.
  3. Apply the following changes;
    1. Create a new revision of the project, by selecting Project > Revisions and add a new revision based on DOC_TANDEM_MAX_10, for example DOC_TANDEM_CVSX_NIOS_TSN.
    2. Remove the previous revision.
    3. Change the target device, by selecting Assignments > Device > 5CSXFC6D6F31C6:
      Figure 5. Selected Device
  4. Change the name of the top-level Verilog HDL file from to DOC_TANDEM_MAX10.v to DOC_TANDEM_CVSX_NIOS_TSN.v
  5. In the new top-level Verilog HDL file, change the name of the main Qsys instance u-doc to match the name of the .qsys file. For example: DOC_TANDEM_CVSX_NIOS_TSN_QSYS