External Memory Interfaces Cyclone® 10 GX FPGA IP User Guide

ID 683663
Date 4/01/2024
Document Table of Contents

10.7. Debugging Cyclone® 10 GX EMIF IP

You can debug hardware failures by connecting to the EMIF Debug Toolkit or by exporting an Avalon® -MM slave port, from which you can access information gathered during calibration. You can also connect to this port to mask ranks and to request recalibration.

Accessing the Exported Avalon® -MM Port

You can access the exported Avalon® -MM port in two ways:

  • Via the External Memory Interface Debug Toolkit
  • Via On-Chip Debug (core logic on the FPGA)