External Memory Interfaces Cyclone® 10 GX FPGA IP User Guide

ID 683663
Date 4/01/2024
Document Table of Contents How to Enter Calculated Channel Signal Integrity Values

You should enter calculated channel loss values in the Channel Signal Integrity section of the Board (or Board Timing) tab of the parameter editor.

For Cyclone® 10 external memory interfaces, the default channel loss displayed in the parameter editor is based on the selected configuration (different values for single rank versus dual rank), and on internal Intel reference boards. You should replace the default value with the value that you calculate.