External Memory Interfaces Cyclone® 10 GX FPGA IP User Guide

ID 683663
Date 4/01/2024
Document Table of Contents

4.4.13. sideband1

address=44(32 bit)

Field Bit High Bit Low Description Access
mmr_refresh_req 3 0

Rank Refresh Request. When asserted, indicates a refresh request to the specific rank. Controller clears this bit to 0 when the refresh is executed.