External Memory Interfaces Cyclone® 10 GX FPGA IP User Guide

ID 683663
Date 4/01/2024
Document Table of Contents

7. Cyclone® 10 GX EMIF IP for LPDDR3

This chapter contains IP parameter descriptions, board skew equations, pin planning information, and board design guidance for Cyclone® 10 GX external memory interfaces for LPDDR3.