Serial Lite IV Intel® FPGA IP User Guide

ID 683655
Date 12/01/2021
Public
Document Table of Contents

3.1.4. TX MII Encoder

The TX MII encoder handles the packet transmission from the MAC to the TX PCS.
In PAM4 mode, a custom PCS always contains four Ethernet channels. Therefore the MII bus data pattern in PAM4 mode is different than the MII bus data pattern in NRZ mode. The following figure shows the data pattern on the 8-bit MII bus in PAM4 modulation mode. The START and END CW appear once in every four MII lanes.
Figure 14. PAM4 Modulation Mode MII Data Pattern
The following figure shows the data pattern on the 8-bit MII bus in NRZ modulation mode. The START and END CW appear in every MII lanes.
Figure 15. NRZ Modulation Mode MII Data Pattern

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