Differences Among Altera® SoC Device Families

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ID 683648
Date 8/29/2025
Public
Document Table of Contents
Document Table of Contents x
Differences Among Altera® SoC Device Families
Differences Among Altera® SoC Device Families x
Overview of HPS Modules HPS Micro Processor Unit Subsystem Differences Booting and Configuration Differences Cache Coherency Unit Differences Generic Interrupt Controller Differences HPS System Memory Management Unit Differences HPS On-Chip RAM Differences HPS Error Correction Differences HPS DMA Controller Differences HPS Clock Manager Differences HPS Reset Manager Differences HPS FPGA Manager Differences HPS System Manager Differences HPS Scan Manager Differences HPS Security Feature Differences HPS System Interconnect and Firewalls Differences HPS-FPGA Bridge Differences HPS General Purpose I/O Interface Differences I/O Pin Multiplexing Differences HPS Mailbox Differences HPS SDRAM Controller Subsystem Differences HPS NAND Flash Controller Differences HPS SD/eMMC Host Controller Differences Combo DLL PHY Differences HPS Quad SPI Flash Controller Differences HPS USB 2.0 OTG Controller Differences HPS USB 3.1 Gen1 Controller Differences HPS EMAC Differences HPS SPI Controller Differences HPS I2C Controller Differences I3C Controller Differences HPS UART Controller Differences HPS CAN Controller Differences HPS Timer Differences HPS Watchdog Timer Differences HPS CoreSight Debug and Trace Differences Revision History for Differences Among Altera® SoC Device Families
Differences Among Altera® SoC Device Families

HPS NAND Flash Controller Differences

NAND Flash Controller Feature

Cyclone® V SoC

Arria® V SoC

 Arria® 10 SoC

Stratix® 10 SoC,

Agilex™ 7

F-Series/I-Series/

M-Series SoC

Agilex™ 5

E-Series/D-Series SoC,

Agilex™ 3

C-Series SoC
NAND Device Standard

ONFI 1.0

ONFI 1.0

ONFI 1.0

ONFI 1.x, ONFI 2.x

Toggle 1.x, 2.x

ONFI 3.x, 4.1 no EZ NAND

TLC device only compatible with ONFI
Interface Width

Interface for 8-bit devices.

Interface for 8- and 16-bit devices.

Interface for 8- and 16-bit devices.

Interface for 8- and 16-bit devices.
Data Rate Mode

SDR mode

SDR mode

SDR mode

SDR and NV DDR mode
Flash Operating Frequency Supports up to 50 MHz Supports up to 50 MHz Supports up to 50 MHz Supports up to 200 MHz
Routing Signals to FPGA Fabric Yes Yes Yes

No
PHY support PHY included as part of the controller PHY included as part of the controller PHY included as part of the controller

Separate Combo PHY shared to interface with SD/eMMC controller
IP Cadence NAND Flash Controller version R5 Cadence NAND Flash Controller version R5 Cadence NAND Flash Controller version R5 Cadence NAND Flash Controller IP6019
Level Two Title