Differences Among Altera® SoC Device Families

ID 683648
Date 8/29/2025
Public

HPS FPGA Manager Differences

FPGA Manager Feature Cyclone® V SoC,

Arria® V SoC

Arria® 10 SoC Stratix® 10 SoC,

Agilex™ 7

F-Series/I-Series/

M-Series SoC

Agilex™ 5

E-Series/D-Series SoC,

Agilex™ 3

C-Series SoC

FPGA Manager present Yes Yes No – all configuration is handled by the SDM No – all configuration is handled by the SDM
Full configuration of FPGA Yes Yes N/A - Configuration handled by SDM N/A - Configuration handled by SDM
Partial reconfiguration of FPGA Yes Yes N/A - Configuration handled by SDM N/A - Configuration handled by SDM
CRC Error Message data registers (EMR) No Yes N/A N/A
General Purpose 32-bit Input/Output from HPS to FPGA Yes Yes Yes 13 Yes13
Remote System Update No No No – all configuration is handled by the SDM No – all configuration is handled by the SDM
13 Starting from Stratix® 10 device, the GPIO signals were moved into the System Manager.