Differences Among Altera® SoC Device Families

ID 683648
Date 8/29/2025
Public

HPS System Memory Management Unit Differences

System Memory Management Unit Feature

Cyclone® V SoC,

Arria® V SoC

Arria® 10 SoC

Stratix® 10 SoC,

Agilex™ 7

F-Series/I-Series/

M-Series SoC

Agilex™ 5

E-Series/D-Series SoC,

Agilex™ 3

C-Series SoC

SMMU implementation

N/A

N/A

ARM MMU-500 r2p4

ARM MMU-600

TCU programming interface

N/A

N/A

AXI4

APB4

Untranslated Transaction support

N/A

N/A

N/A

Two levels address translation

Transaction to NCore NoC

N/A

N/A

N/A

Support of domain information

Handle traffic from the fabric

N/A

N/A

N/A

New TBU instance in the APS

TBU instances connect to the TCU

N/A

N/A

N/A

New DTI network

Cache Stashing support

N/A

N/A

N/A

Yes