Differences Among Intel SoC Device Families

ID 683648
Date 8/22/2018
Public

HPS I/O Configuration Differences

The available I/Os on SoC devices are divided into the following categories:

  • Dedicated function – Each I/O has only one function and cannot be used for other purposes.
  • Dedicated I/O with loaner capability – The I/Os are primarily used by the HPS, but individual I/Os can be used by the FPGA if the HPS is not using them.
  • Dedicated I/O – The I/Os can be used only by the HPS. The pins are not accessible to logic in the FPGA.
  • Shared I/O – The I/Os can be used by either the HPS or the FPGA. These pins are used by HPS peripheral signals, particularly high-speed HPS peripherals such as EMAC and USB. Pins can be assigned to either the HPS or the FPGA in blocks of 12.
  • FPGA I/O – These I/Os can only be used by the FPGA. Slow-speed HPS peripheral signals can be routed through the FPGA fabric and assigned to FPGA I/O.
Table 7.  Types and Numbers of HPS I/O Pins
Type Cyclone V SoC Arria V SoC Arria 10 SoC Stratix 10 SoC
Reset pins

3 dedicated function

3 dedicated function

2 dedicated function

SDM controls HPS resets18
Clock pins

2 dedicated function

2 dedicated function

1 dedicated function

Choose one of the 48 dedicated I/Os
JTAG pins

5 dedicated pins

JTAG interface is independent of FPGA JTAG interfaces

5 dedicated pins

JTAG interface is independent of FPGA JTAG interfaces

Chained internally into FPGA JTAG interface

4 optional dedicated

Independent or chained internally into FPGA JTAG interface

Peripherals pins

Up to 67 dedicated I/Os with loaner capability

94 dedicated I/Os with loaner capability

14 dedicated I/Os

48 shared I/Os

48 total dedicated I/Os (including pins used for clock and JTAG)
Supported voltages

3.3 V

3.0 V

2.5 V

1.8 V

1.5 V

3.3 V

3.0 V

2.5 V

1.8 V

1.5 V

3.0 V

2.5 V

1.8 V

1.8 V
18 The SDM controls the HPS resets, including POR, warm, cold, and debug resets. You can assign HPS_COLD_RESET to an available SDM I/O pin. This pin serves both as an input to reset the HPS and as an output to assert reset to the system when the HPS is in reset.

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