Intel® Quartus® Prime Standard Edition User Guide: PCB Design Tools

ID 683619
Date 9/24/2018
Document Table of Contents Download IBIS Models

Intel provides IBIS models for almost all FPGA and FPGA configuration devices. You can use the IBIS models from the website to perform early simulations of the I/O buffers you expect to use in your design as part of a pre-layout analysis.

Downloaded IBIS models have the RLC package values set to one particular device in each device family.

The .ibs file can be customized for your device package and can be used for any simulation. IBIS models downloaded and used for simulations in this manner are generic. They describe only a certain set of models listed for each device on the Intel IBIS Models page of the Altera website. To create customized models for your design, use the IBIS Writer as described in the next section.

To simulate your design with the model accurately, you must adjust the RLC values in the IBIS model file to match the values for your particular device package by performing the following steps:

  1. Download and expand the ZIP file (.zip) of the IBIS model for the device family you are using for your design. The .zip file contains the .ibs file along with an IBIS model user guide and a model data correlation report.
  2. Download the Package RLC Values spreadsheet for the same device family.
  3. Open the spreadsheet and locate the row that describes the device package used in your design.
  4. From the package’s I/O row, copy the minimum, maximum, and typical values of resistance, inductance, and capacitance for your device package.
  5. Open the .ibs file in a text editor and locate the [Package] section of the file.
  6. Overwrite the listed values copied with the values from the spreadsheet and save the file.