Intel® Quartus® Prime Standard Edition User Guide: PCB Design Tools

Download
ID 683619
Date 9/24/2018
Public
Document Table of Contents

2.5.12.9. Board and Trace Termination

The board trace and termination block of the simulation SPICE deck is provided only as an example. Replace this block with your specific board loading models.

Board Trace and Termination Block

* I/O Board Trace And Termination Description 
* - Replace this with your board trace and termination description
wtline pin vssn load vssn N=1 L=1 RLGCMODEL=tlinemodel
.MODEL tlinemodel W MODELTYPE=RLGC N=1 Lo=7.13n Co=2.85p
Rterm2 load vssn 1x

Did you find the information on this page useful?

Characters remaining:

Feedback Message