Intel® Stratix® 10 General Purpose I/O User Guide

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ID 683518
Date 7/07/2021
Public
Document Table of Contents

2.3. Programmable IOE Features in Intel® Stratix® 10 Devices

Table 4.   Intel® Stratix® 10 Programmable IOE Features Settings and Assignment Name
Feature

Setting

Condition

Intel® Quartus® Prime

Assignment Name

Slew Rate Control 0 (Slow), 1 (Fast). Default is 1. Disabled if you use the RS OCT feature. SLEW_RATE
I/O Delay Refer to the device datasheet

INPUT_DELAY_CHAIN

OUTPUT_DELAY_CHAIN

Open-Drain Output On, Off. Default is Off AUTO_OPEN_DRAIN_PINS
Bus-Hold On, Off. Default is Off. Disabled if you use the weak pull-up resistor feature. ENABLE_BUS_HOLD_CIRCUITRY
Weak Pull-up Resistor On, Off. Default is Off. Disabled if you use the bus-hold feature. WEAK_PULL_UP_RESISTOR
Pre-Emphasis 0 (disabled), 1 (enabled). Default is 1. PROGRAMMABLE_PREEMPHASIS
Differential Output Voltage 0 (low), 1 (medium low), 2 (medium high), 3 (high). Default is 2. PROGRAMMABLE_VOD
Table 5.   Intel® Stratix® 10 Programmable IOE Features I/O Buffer Types and I/O Standards SupportThis table lists the I/O buffer types and I/O standards that support the programmable IOE features. For information about which I/O standards are available for each I/O buffer type, refer to the related information.
Feature I/O Buffer Type Support

I/O Standards Support

LVDS I/O 3 V I/O

HPS I/O

(SoC Devices Only)

Slew Rate Control 11 Yes Yes Yes
  • 3.0 V /3.3 V LVTTL
  • 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.0 V/3.3 V LVCMOS
  • SSTL-18, SSTL-15, SSTL-135, SSTL-125, and SSTL-12
  • 1.2 V, 1.5 V, and 1.8 V HSTL
  • HSUL-12
  • POD12
  • Differential SSTL-18, Differential SSTL-15, Differential SSTL-135, Differential SSTL-125, and Differential SSTL-12
  • Differential 1.2 V, 1.5 V, and 1.8 V HSTL
  • Differential HSUL-12
I/O Delay Yes Yes
Open-Drain Output11 Yes Yes Yes
  • 3.0 V LVTTL
  • 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.0 V LVCMOS
Bus-Hold11 Yes Yes
Weak Pull-up Resistor11 Yes Yes Yes
Pre-Emphasis Yes
  • LVDS
  • RSDS
  • Mini-LVDS
  • LVPECL
  • With OCT fast slew rate mode:
    • POD12 and Differential POD12
    • SSTL-12 and Differential SSTL-12
Differential Output Voltage Yes
  • LVDS
  • RSDS
  • Mini-LVDS
  • LVPECL
11 Not available for the 3.3 V I/O bank (bank 3C) of the HF35 package of the Intel® Stratix® 10 GX 400 and SX 400 devices.

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