Intel® Stratix® 10 General Purpose I/O User Guide

ID 683518
Date 7/07/2021
Public

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2.4. On-Chip I/O Termination in Intel® Stratix® 10 Devices

Serial (RS) and parallel (RT) OCT provides I/O impedance matching and termination capabilities. OCT maintains signal quality, saves board space, and reduces external component costs.

The Intel® Stratix® 10 devices support OCT in all FPGA I/O banks with the following exceptions:
  • The 3 V I/Os support only OCT without calibration.
  • The 3.3 V I/Os do not support OCT.
Figure 9. Single-ended Termination (RS and RT) This figure shows the single-ended termination schemes supported in Intel® Stratix® 10 devices. RT1 and RT2 are dynamic parallel terminations and are enabled only if the device is receiving. In bidirectional applications, RT1 and RT2 are automatically switched on when the device is receiving and switched off when the device is driving.


Table 9.  OCT Schemes Supported in Intel® Stratix® 10 Devices
Direction OCT Schemes I/O Type Support
LVDS I/O 3 V I/O 3.3 V I/O
Output RS OCT with calibration Yes
RS OCT without calibration Yes Yes
Input RT OCT with calibration Yes
RD OCT (LVDS I/O standard only) Yes
Bidirectional Dynamic RS and RT OCT Yes

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