188.8.131.52. Output and Output Enable Paths
Each LVDS I/O output path contains two stages of DDIOs, which are half-rate and full-rate.
The 3 V I/Os do not support DDIOs.
The difference between the output path and output enable (OE) path is that the OE path does not contain full-rate DDIO. To support packed-register implementations in the OE path, a simple register operates as full-rate DDIO. For the same reason, only one half-rate DDIO is present.
The OE path operates in the following three fundamental modes:
- Bypass—the core sends data directly to the delay element, bypassing all DDIOs.
- Packed Register—bypasses half-rate DDIO.
- SDR output at half-rate—half-rate DDIOs convert data from full-rate to half-rate.
In Intel® Stratix® 10 devices, each 3 V I/O bank supports only two output enables (OE) for its eight single-ended I/Os.
Did you find the information on this page useful?