4.1. GPIO Intel® FPGA IP
The GPIO IP core supports the GPIO components and features of the Intel® Stratix® 10 device family. You can use the Intel® Quartus® Prime parameter editor to configure the GPIO IP core.
Components of the GPIO IP core:
- Double data rate input/output (DDIO)—doubles or halves the data-rate of a communication channel
- Delay chains—configure the delay chains to perform specific delay and assist in I/O timing closure
- I/O buffers—connect the pads to the FPGA
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