Multi Channel DMA Intel® FPGA IP for PCI Express* Design Example User Guide

ID 683517
Date 6/09/2025
Public

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3.5.8.2. PIO Test

This test writes and reads from the PIO memory and validates the data. If data validation passes, the result is a Pass; otherwise, it is a Fail.

  1. Perform a PIO test after completing the instructions outlined in Prerequisites to check if the setup works correctly by running the command below:

    $sudo ./perfq_app -b 0000:08:00.0 -o

    Note: Here the -b option should be provided with the correct BDF of the FPGA endpoint card in the system. It can be checked using the lspci command.
    If successful, the application displays a Pass status as shown in the image below:
  2. The design example can be reset using the utility below when needed.
    1. Build the devmem utility.
      Note: The devmem utility works only with the ifc_uio driver.

      $ cd software/user/cli/devmem

      $ make clean all

    2. Perform a reset by running the command below:

      $ sudo ./devmem 0000:01:00.0 0 0x00200120 0x1

      Expected printout looks like the image below: