Arria® 10 or Cyclone® 10 GX Avalon® Memory-Mapped (Avalon-MM) DMA Interface for PCI Express* Solutions User Guide

ID 683425
Date 9/10/2024
Public
Document Table of Contents

6.2. Type 0 Configuration Space Registers

Figure 28. Type 0 Configuration Space Registers - Byte Address Offsets and LayoutEndpoints store configuration data in the Type 0 Configuration Space. The Correspondence between Configuration Space Registers and the PCIe Specification lists the appropriate section of the PCI Express Base Specification that describes these registers.