Intel® Arria® 10 or Intel® Cyclone® 10 GX Avalon® Memory-Mapped (Avalon-MM) DMA Interface for PCI Express* Solutions User Guide

ID 683425
Date 6/03/2021
Public
Document Table of Contents

This interface is available when you select the internal Descriptor Controller. It receives the Read DMA descriptors which are fetched by the Read Data Mover. Connect the interface to the Read DMA Avalon-MM master interface.

Read Descriptor Table Avalon-MM Slave Interface

Signal Name

Direction

Description

RdDTSAddress_i[7:0]

Input

Specifies the descriptor table address.

RdDTSBurstCount_i[4:0] or [5:0]

Input

Specifies the burst count of the transaction in words.

RdDTSChipSelect_i

Input

When asserted, indicates that the read targets this slave interface.

RdDTSWriteData_i[255:0] or [127:0]

Input

Specifies the descriptor.

RdDTSWrite_i

Input

When asserted, indicates a write transaction.

RdDTSWaitRequest_o

Output When asserted, indicates that the Avalon-MM slave device is not ready to respond.