Intel® Arria® 10 or Intel® Cyclone® 10 GX Avalon® Memory-Mapped (Avalon-MM) DMA Interface for PCI Express* Solutions User Guide

ID 683425
Date 6/03/2021
Public
Document Table of Contents

3.4. Device Identification Registers

Table 20.  Device ID RegistersThe following table lists the default values of the read‑only Device ID registers. You can use the parameter editor to change the values of these registers. Refer to Type 0 Configuration Space Registers for the layout of the Device Identification registers.

Register Name

Range

Default Value

Description

Vendor ID

16 bits

0x00001172

Sets the read-only value of the Vendor ID register. This parameter cannot be set to 0xFFFF, per the PCI Express Specification.

Address offset: 0x000.

Device ID

16 bits

0x00000000

Sets the read-only value of the Device ID register. This register is only valid in the Type 0 (Endpoint) Configuration Space.

Address offset: 0x000.

Revision ID

8 bits

0x00000000

Sets the read-only value of the Revision ID register.

Address offset: 0x008.

Class code

24 bits

0x00000000

Sets the read-only value of the Class Code register.

The 24-bit Class Code register is further divided into three 8-bit fields: Base Class Code, Sub-Class Code and Programming Interface. For more details on these fields, refer to the PCI Express Base Specification.

Address offset: 0x008.

Subsystem Vendor ID

16 bits

0x00000000

Sets the read-only value of the Subsystem Vendor ID register in the PCI Type 0 Configuration Space. This parameter cannot be set to 0xFFFF per the PCI Express Base Specification. This value is assigned by PCI-SIG to the device manufacturer. This register is only valid in the Type 0 (Endpoint) Configuration Space.

Address offset: 0x02C.

Subsystem Device ID

16 bits

0x00000000

Sets the read-only value of the Subsystem Device ID register in the PCI Type 0 Configuration Space.

Address offset: 0x02C

Did you find the information on this page useful?

Characters remaining:

Feedback Message