New features in the Quartus® Prime 18.0 software release:
- Added support for Intel® Cyclone® 10 GX devices for up to Gen2 x4 configurations.
- Added optional parameter to invert the RX polarity.
The Intel® Arria® 10 or Intel® Cyclone® 10 GX Avalon-MM DMA for PCI Express supports the following features:
- Complete protocol stack including the Transaction, Data Link, and Physical Layers implemented as hard IP.
- Native support for Gen1 x8, Gen2 x4, Gen2 x8, Gen3 x2, Gen3 x4, Gen3 x8 for Endpoints for Intel® Arria® 10 devices. The variant downtrains when plugged into a lesser link width or a system which supports a lower maximum link rate.
- Native support for Gen2 x4 for Endpoints for Intel® Cyclone® 10 GX devices. The variant downtrains when plugged into a lesser link width or a system which supports a lower maximum link rate.
- Dedicated 16 KB receive buffer.
- Support for 128- or 256-bit Avalon-MM interface to Application Layer with embedded DMA up to Gen3 ×8 data rate for Intel® Arria® 10.
- Support for 128-bit Avalon-MM interface to Application Layer with embedded DMA for Gen2 x4 for Intel® Cyclone® 10 GX devices.
- Support for 32- or 64-bit addressing for the Avalon-MM interface to the Application Layer.
- Platform Designer design example demonstrating parameterization, design modules, and connectivity.
- Extended credit allocation settings to better optimize the RX buffer space based on application type.
- Optional end-to-end cyclic redundancy code (ECRC) generation and checking and advanced error reporting (AER) for high reliability applications.
- Support for Separate Reference Clock No Spread Spectrum (SRNS) architecture. The Separate Reference Clock with Independent Spread Spectrum (SRIS) architecture is not supported.
- Easy to use:
- Flexible configuration.
- No license requirement.
- Design examples to get started.
|Feature||128-Bit Interface||256-Bit Interface 1|
|Gen3 2||x2, x4||x4, x8|
|Root Port||Not Supported||Not Supported|
|Tags supported||16||16 or 256|
|Maximum descriptor size||1 MB||1 MB|
|Maximum payload size||128 or 256||128 or 256|
|Immediate write3||Not supported||Supported|
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