Visible to Intel only — GUID: tta1661431548225
Ixiasoft
Visible to Intel only — GUID: tta1661431548225
Ixiasoft
31.4. Switch IP Registers
Address | Register | Access | Description |
---|---|---|---|
Parameterization registers | |||
0x0000 | PROD_ID | RO | Read this register for the Switch IP product ID. This register always returns 0x0000_0235 |
0x0004 | VERSION | RO | Read this register for the version information for the Intel Quartus release that Intel uses to build the Switch. |
0x0008 | INTF_TYPE | RO | Read this register to determine the interface type. This register returns:
|
0x000C | DEBUG_ENABLED | RO | Read this register to determine if Debug features are on. |
0x0010 | UNINTERRUPTED_INPUTS | RO | Read this register to determine if All inputs are uninterrupted is on. |
0x0014 | AUTO_CONSUME | RO | Read this register to determine if Autoconsume is on. |
0x0018 | NUM_INPUTS | RO | Read this register to determine the number of configured inputs. |
0x001C | NUM_OUTPUTS | RO | Read this register to determine the number of configured outputs. |
0x0020 | USE_TREADIES | RO | Read this register to determine if ‘tready’ signal present on switch streaming interfaces is on. |
0x0024 | CRASH SWITCH | RO | Read this register to determine if Crash switching is on. |
0x0028 to 0x011F | RESERVED | - | Unused. |
Control and debug registers For more details of these registers, refer to Control Packets |
|||
0x0120 to 0x13F | RESERVED | - | Unused. |
0x0140 | STATUS | RO | Bit 0: Goes low when a switch starts and returns high when switching completes Bit 1: Pending run-time control bit. Goes high when a write occurs to one of the input or output control registers. Goes low after a write to the COMMIT register and the IP switch starts the switch. |
0x0144 | COMMIT | RW | Write 1 to bit 0 to commit the control register settings and request a new switch. The new switch starts immediately if no switch is currently in progress, otherwise it starts when the current switch completes. |
0x0148 | INPUT_CONTROL_0 | RW 80 | Each input has a control register. The IP uses the two input LSBs for control, decoded as follows:
|
0x014C | INPUT_CONTROL_1 | RW80 | |
0x0150 | INPUT_CONTROL_2 | RW80 | |
0x0154 | INPUT_CONTROL_3 | RW80 | |
0x0158 | INPUT_CONTROL_4 | RW80 | |
0x015C | INPUT_CONTROL_5 | RW80 | |
0x0160 | INPUT_CONTROL_6 | RW80 | |
0x0164 | INPUT_CONTROL_7 | RW80 | |
0x0168 to 0x187 | RESERVED | - | Reserved. |
0x0188 | OUTPUT_CONTROL_0 | RW80 | Set bit[8] to enable an output. Set bits [7:0] to give the integer value of the input to drive the output. An out-of-range input value has the effect of disabling the output. Inputs and outputs start at zero. For example, a write of 0x104 to an output control register enables the output and selects input number 4. If the two LSBs in INPUT_CONTROL_4 are 01, the IP enables the connection and input number 4 drives the output. |
0x018C | OUTPUT_CONTROL_1 | RW80 | |
0x0190 | OUTPUT_CONTROL_2 | RW80 | |
0x0194 | OUTPUT_CONTROL_3 | RW80 | |
0x0198 | OUTPUT_CONTROL_4 | RW80 | |
0x019C | OUTPUT_CONTROL_5 | RW80 | |
0x01A0 | OUTPUT_CONTROL_6 | RW80 | |
0x01A4 | OUTPUT_CONTROL_7 | RW80 | |
0x01A8 to 0x01C4 | RESERVED | - | Reserved. |
Register Bit Descriptions
Name | Bits | Description |
Switch product ID | 31:0 | This register always returns 0x0000_0235 |
Name | Bits | Description |
Register map version | 7:0 | Register map version. Returns 0x01. |
Unused | 15:8 | Unused. Returns 0x00 |
QPDS minor revision | 23:16 | Updated for each release. For 22.4, returns 0x04 |
QPDS major revision | 31:24 | Updated for each release. For 22.4, returns 0x16 (22 decimal) |
Name | Bits | Description |
Interface type parameterization bits | 1:0 | A 2-bit interface type register:
|
Unused | 31:2 | Unused. |
Name | Bits | Description |
Debug features | 31:0 | Unused. |
Name | Bits | Description |
Uninterrupted inputs parameterization bit | 0 | Returns 1 if you turn on All inputs are uninterrupted. |
Unused | 31:1 | Unused. |
Name | Bits | Description |
Autoconsume inputs parameterization bit | 0 | Returns 1 if you turn on Autoconsume inputs. |
Unused | 31:1 | Unused. |
Name | Bits | Description |
Number of inputs | 31:0 | Returns the number of inputs configured. |
Name | Bits | Description |
Number of outputs | 31:0 | Returns the number of outputs configured |
Name | Bits | Description |
use_ treadies parameterization bit | 0 | Returns 1 if you turn on ‘tready’ signal present on switch streaming interfaces. |
Unused | 31:1 | Unused. |
Name | Bits | Description |
Crash switching parameterization bit | 0 | Returns 1 if you turn on Crash switching. |
Unused | 31:1 | Unused. |
Name | Bits | Description |
Status bit | 0 | Goes low when a switch starts and returns high when switching completes |
Pending register updates bit | 1 | Goes high when a write occurs to one of the input or output control registers. Goes low after a write to the COMMIT register and the switch starts. |
Unused | 31:2 | Unused. |
Name | Bits | Description |
Commit register | 0 | Write 1 to commit the control register settings and request a new switch. The new switch starts immediately if no switch is currently in progress, otherwise it starts when the current switch completes. |
Unused | 31:1 | Unused. |
Name | Bits | Description |
Enable bit | 0 | Enable this input |
Consume bit | 1 | Consume this input. You must enable the input for the consume bit to take effect. |
Unused | 31:2 | Unused. |
Name | Bits | Description |
Source | 7:0 | Integer value of the input source to drive this output. An out-of-range input source value turns off the output. |
Enable bit | 8 | Turn on this output |
Unused | 31:9 | Unused. |