19.1. About the Frame Cleaner IP
Every IP in the Video and Vision Processing Suite is tolerant of field size mismatch errors, so including the Frame Cleaner IP in a pipeline built entirely from Intel IPs is not necessary. It can help in the debug processes when building and testing a video pipeline.
If you choose to write your own Intel FPGA streaming video compliant IPs, you may add the Frame Cleaner IP to the pipeline at the input to your IPs. The IP allows you to write the code for your IPs without considering their behavior in all the potential error cases.