Intel® FPGA SDK for OpenCL™ Standard Edition: Best Practices Guide

ID 683176
Date 9/24/2018
Public
Document Table of Contents

4.4. Limitations

The has some limitations.
  • The Profiler can only extract one set of profile data from a kernel while it is running.

    If the Profiler collects the profile data after kernel execution completes, you can call the host API to generate the profile.mon file multiple times.

    For more information on how to collect profile data during kernel execution, refer to the Collecting Profile Data During Kernel Execution section of the Standard Edition Programming Guide.

  • Profile data is not persistent across OpenCL programs or multiple devices.

    You can request profile data from a single OpenCL program and on a single device only. If your host swaps a new kernel program in and out of the FPGA, the Profiler will not save the profile data.

  • Instrumenting the Verilog code with performance counters increases hardware resource utilization (that is, FPGA area usage) and typically decreases performance.

    For information on instrumenting the Verilog code with performance counters, refer to the Instrumenting the Kernel Pipeline with Performance Counters section of the Standard Edition Programming Guide.

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