Intel® FPGA SDK for OpenCL™ Standard Edition: Best Practices Guide

ID 683176
Date 9/24/2018
Public
Document Table of Contents

2.5.1. Features of the System Viewer

The system viewer is an interactive graphical report of your OpenCL™ system that allows you to review information such as the sizes and types of loads and stores, stalls, and latencies.

You may interact with the system viewer in the following ways:

  • Use the mouse wheel to zoom in and out within the system viewer.
  • Review portions of your design that are associated with red logic blocks. For example, a logic block that has a pipelined loop with a high initiation interval (II) value might be highlighted in red because the high II value might affect design throughput.
  • Hover over any node within a block to view information on that node in the tooltip and in the details pane.
  • Select the type of connections you wish to include in the system viewer by unchecking the type of connections you wish to hide. By default, both Control and Memory are checked in the system viewer. Control refers to connections between blocks and loops. Memory refers to connections to and from global or local memories. If your design includes connections to and from read or write channels, you also have a Channels option in the system viewer.

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