Intel® FPGA SDK for OpenCL™ Standard Edition: Best Practices Guide

ID 683176
Date 9/24/2018
Public
Document Table of Contents

4.2. GUI

The GUI displays statistical information collected from memory and channel or pipe accesses.
Table 8.  Summary Heading in the GUI
Heading Description
Board Name of the accelerator board that the uses during kernel emulation and execution.
Global Memory BW (DDR) Maximum theoretical global memory bandwidth available for each memory type (for example, DDR).

Directly below the summary heading, you can view detailed profile information by clicking on the available tabs.

Important: In the following sections, information that relates to the SDK's channel extension also applies to OpenCL pipes.

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