Intel® Arria® 10 SX Device Errata and Design Recommendations

ID 683161
Date 8/03/2022
Public
Document Table of Contents

4.1.11. 729817: MainID Register Alias Addresses Are Not Mapped on Debug APB Interface

Description

The Arm* Debug Architecture specifies registers 838 and 839 as “Alias of the MainID register.” They should be accessible using the APB Debug interface at addresses 0xD18 and 0xD1C. The two alias addresses are not implemented in Cortex* -A9. A read access to either of these two addresses returns 0 instead of the MainID register value.

Note that read accesses to these two registers using the internal CP14 interface are trapped to UNDEF, which is compliant with the Arm* Debug architecture. Therefore this erratum only applies to the alias addresses using the external Debug APB interface.

Impact

If the debugger, or any other external agent, tries to read the MainID register using the alias addresses, it receives a faulty answer (0x0), which can cause indeterminate errors in the debugger afterwards.

Workaround

The workaround for this erratum is to always access the MainID register at its original address, 0xD00 and not to use its alias address.

Category

Category 3

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