Intel® Arria® 10 SX Device Errata and Design Recommendations

ID 683161
Date 8/03/2022
Document Table of Contents

4.1.18. 761321: MRC and MCR Are Not Counted in Event 0x68


Event 0x68 counts the total number of instructions passing through the register rename pipeline stage. The event is also reported externally on PMUEVENT[9:8]. However, with this erratum, the MRC and MCR instructions are not counted in this event or reported externally on PMUEVENT[9:8]..


The implication of this erratum is that the values of event 0x68 and PMUEVENT[9:8] are imprecise, omitting the number of MCR and MRC instructions. The inaccuracy of the total count depends on the rate of MRC and MCR instructions in the code.


No workaround is possible to achieve the required functionality of counting precisely how many instructions are passing through the register rename pipeline stage when the code contains some MRC or MCR instructions.


Category 3