Accelerator Functional Unit Developer’s Guide for Intel® FPGA Programmable Acceleration Card

ID 683129
Date 7/20/2020
Document Table of Contents

6.1.4. Prepare the Remote Debug Host

Copy the following files from the Acceleration Stack installation over to a convenient working directory on the remote debug host:

  • The Signal Tap .stp file compiled with your AFU. In the case of the nlb_mode_0_stp example AFU, the .stp file is located in the Acceleration Stack installation as $OPAE_PLATFORM_ROOT/hw/samples/nlb_mode_0_stp/hw/par/stp_basic.stp.
  • The following two files support establishing a connection on the remote debug host to the AFU Signal Tap instances on the Intel® FPGA PAC. These files are part of the Acceleration Stack release – do not modify them.