Intel® Agilex™ SEU Mitigation User Guide

ID 683128
Date 12/30/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.5. Design Hierarchy Sensitivity Classification

To classify the criticality of each logic block, generate design partitions and assign them sensitivity ID tags in the Intel® Quartus® Prime software. The software stores these classifications in the .smh file. When an operation error occurs, the system can refer to the file to determine the error's criticality and take appropriate actions.

The Intel® Quartus® Prime software generates the sensitivity mask for the entire design. The .smh file contains a mask for the design's sensitive bits in a compressed format.

  • To generate .smh files, you need a licensed version of the Intel® Quartus® Prime software.
  • To access the .smh file, add an instance of the Advanced SEU Detection Intel® FPGA IP to your design.