Intel® Agilex™ SEU Mitigation User Guide

ID 683128
Date 9/26/2022
Public
Document Table of Contents

2.3.1.3. Off-Chip Lookup Sensitivity Processing

For the off-chip sensitivity processing, the Advanced SEU Detection IP reads the error message queue content and presents the information to a system processor. The processor determines whether the failure affects the device operation. The system processor implements the algorithm to perform a lookup against the .smh file.
Figure 3. System Overview for Off-Chip Lookup Sensitivity Processing with Advanced SEU Detection IP


Figure 4. Process Flow for Off-Chip Lookup Sensitivity Processing


Did you find the information on this page useful?

Characters remaining:

Feedback Message