Intel® Agilex™ SEU Mitigation User Guide

ID 683128
Date 9/26/2022
Public
Document Table of Contents

2.3.1.2. On-Chip Lookup Sensitivity Processing

For the on-chip sensitivity processing, the Advanced SEU Detection IP reads the error message queue content and then compares single-bit error locations with a sensitivity map. This check determines whether or not the failure affects the device operation.
Figure 1. System Overview for On-Chip Lookup Sensitivity Processing with Advanced SEU Detection IP


Figure 2. Process Flow for On-Chip Lookup Sensitivity Processing


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