2.1. Transceiver Channel Placement
The Intel® Stratix® 10 product family introduces several transceiver tile variants to support a wide variety of protocol implementations.
|Feature||L-Tile Transceivers||H-Tile Transceivers|
|Maximum Datarate (Chip-to-chip)||GX 2—17.4 Gbps||
|GXT 2—26.6 Gbps|
|Maximum Datarate (Backplane)||GX and GXT—12.5 Gbps|
Possible Combinations of GX and GXT Channels
Bonded Channel Placement with Data Rate Change
Reference Clock Guidelines for L-Tile and H-Tile
2 Refer to the L-Tile/H-Tile Building Blocks section for further descriptions of GX and GXT channels.
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