Visible to Intel only — GUID: mwh1410383450139
Ixiasoft
Visible to Intel only — GUID: mwh1410383450139
Ixiasoft
3.2.2. Disabling Timing Violation on Registers
By default, the x_on_violation_option logic option is enabled for all design registers, resulting in an output of “X” at timing violation. To disable “X” propagation at timing violations on a specific register, disable the x_on_violation_option logic option for the specific register, as shown in the following example from the Intel® Quartus® Prime Settings File (.qsf).
set_instance_assignment -name X_ON_VIOLATION_OPTION OFF -to \ <register_name>
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