Intel® Quartus® Prime Standard Edition User Guide: Third-party Simulation

ID 683080
Date 11/07/2022

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4.3.2. Back-Annotating Simulation Timing Data (VHDL Only)

You can back annotate timing information in a Standard Delay Output File (.sdo) for VHDL simulators. To back annotate the .sdo timing data at the command line, follow these steps:
  1. To compile the .sdo with the ncsdfc program, type the following command at the command prompt. The ncsdfc program generates an <output name> .sdf.X compiled .sdo file
    ncsdfc <project name>_vhd.sdo –output <output name>
    Note: If you do not specify an output name, ncsdfc uses <project name> .sdo.X
  2. Specify the compiled .sdf file for the project by adding the following command to an ASCII SDF command file for the project:
    COMPILED_SDF_FILE = "<project name>.sdf.X" SCOPE = <instance path>
  3. After compiling the .sdf file, type the following command to elaborate the design:
    ncelab worklib.<project name>:entity –SDF_CMD_FILE <SDF Command File>

Example SDF Command File

// SDF command file sdf_file
COMPILED_SDF_FILE = "lpm_ram_dp_test_vhd.sdo.X",
SCOPE = :tb,
SCALE_FACTORS = "1.0:1.0:1.0",