AN 773: Drive-On-Chip Design Example for Intel® MAX® 10 Devices

ID 683072
Date 7/26/2023
Document Table of Contents

7.6.1. Offset Adjustment for Sigma-Delta ADC Interface

Use the offset adjustment to calculate the output voltages in the Drive-on-Chip Design Example.
Table 12.  Sigma-Delta ADC CharacteristicsThe table describes typical characteristics of a sigma-delta ADC and the demodulated output of the sinc3 filter. The output code is a positive value.
Analog Input Voltage Input (mV) Density of 1s Demodulated ADC Code (16-bit)
Full-scale range 640 - -
+ Full scale + 320 100% 65,535
+ Recommended input range + 200 31.25% 53,248
Zero 0 50% 32,768
- Recommended input range - 200 18.75% 12,288
- Full scale - 320 0% 0

The design adds offset values to demodulator results to represent the bipolar input signal and to allow for zero-offset adjustment. The offset values are in the offset_u or offset_w registers.

During normal operation, the offset value is 32,768, or 50% of the full-scale range, to bring the demodulated result into the range of -32,768 to +32,767. The design adjusts the offset value to correct for zero-offset errors during calibration.