AN 773: Drive-On-Chip Design Example for Intel® MAX® 10 Devices

ID 683072
Date 7/26/2023
Document Table of Contents

7.7. Intel® MAX® 10 ADCs

The Drive-On-Chip Design Example for Intel® MAX® 10 devices has dual Intel® MAX® 10 ADCs with Avalon memory-mapped sample storage and threshold violation detection.

Software reads converted samples from an Avalon memory-mapped agent interface.

Threshold violation errors are output on two Avalon streaming sources, one for each of the ADC modules that make up the dual ADC.

To change the thresholds: edit the component settings in Qsys, regenerate the Qsys project, and recompile in the Intel Quartus Prime software.

Figure 29.  Intel® MAX® 10 Dual ADC with Avalon Memory-Mapped Sample Storage and Threshold Violation Detection