AN 773: Drive-On-Chip Design Example for Intel® MAX® 10 Devices

ID 683072
Date 4/22/2021
Public
Document Table of Contents

3.7. Programming the Nios II Software to the Device for the Drive-On-Chip Design Example for Intel® MAX® 10 Devices

Configure the FPGA with the design example hardware
  1. In the Nios II EDS Project explorer, click the <project variant> to highlight the project.
  2. 1. On the Run menu, click Run configurations....
    1. Double click Nios II Hardware to generate a new run configuration.
    2. Click New_configuration.
    3. On the Project tab select the <project variant> project in the Project name drop-down.
    4. On the Target Connection tab, click Refresh Connections.
      The software finds the Intel FPGA Download Cable.
    5. Click Apply to save changes, optionally specifying a name for the new configuration.
    6. Click Run to start the software.
  3. Check that the Nios II console shows the correct FPGA and power board combination. For example for the Tandem Motion-Power 48 V Board project variant:
    [DECODE SYSID] Decoding hardware platform from QSYS SYSID data : 0x003043FE 
    [DECODE SYSID] Design Version : 3.0 
    [DECODE SYSID] FPGA Board : MAX 10M50 Dev Kit 
    [DECODE SYSID] Power Board : Intel Tandem Motion Power
  4. Check the five LEDs (LED0 to LED4) on the Intel MAX 10 development board illumiunate. These five status LEDs indicate errors in the system. Any LED not illuminating indicates a fault and you should switch off the power board immediately.
    LED Description
    LED0 Indicates either overcurrent or overvoltage issue on the first motor.
    LED1 Indicates either overcurrent or overvoltage issue on the second motor.
    LED2 Indicates undervoltage, overvotlage, or overcurrent on DC input voltage.
    LED3 Indicates a fault on the DC-DC converter.
    LED4 Indicates start of ISR.

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