AN 773: Drive-On-Chip Design Example for Intel® MAX® 10 Devices

ID 683072
Date 4/22/2021
Public
Document Table of Contents

11. Document Revision History for AN 773: Drive-on-Chip Design Example for Intel® MAX® 10 Devices

Version Changes
2021.04.22
  • Changed ADC scaling value.
  • Changed signal scaling architecture figure.
  • Deleted Scaling for DC-DC Converter Feedback Samples tables
  • Changed DC Link Monitor
  • Updated DC-DC Converter
  • Added DC-DC Control Simulink Models
  • Added Sigma-Delta ADC Interface for DC-DC Converter
  • Updated DC-DC Converter Control and Status Registers
2021.02.15 Changed PWM frequency from 333 MHz to 300 MHz
2021.01.30
  • Removed FalconEye 2 HSMC board.
  • Renamed to design example.
  • Added Achieving Timing Closure on Motor Control Designs
  • removed EnDat Encoder Interface and BiSS Encoder Interface
2017.11.24
  • Added support for estimating battery state of charge (SOC).
  • Changed name from Drive-on-Chip Reference Design v16.0 to Drive-on-Chip Reference Design for MAX 10 Devices.
  • Rebranded as Intel.
2017.01.10 Initial release.

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