External Memory Interfaces (EMIF) IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 817467
Date 3/31/2025
Public
Document Table of Contents

4.4.28. oct_2 for Agilex 5 E-Series External Memory Interfaces (EMIF) IP - LPDDR5

On-Chip Termination (OCT) interface, representing RZQ pin (channel 2).

Table 119.  Interface: oct_2Interface type: conduit
Port Name Direction Description
oct_rzqin_2 Input Calibrated On-Chip Termination (OCT) input pin channel 2.