Intel® Stratix® 10 SoC FPGA Boot User Guide

ID 683847
Date 1/20/2023
Document Table of Contents

4.8.1. Creating Configuration Files from Command Line

The following example creates the configuration files for CvP:
quartus_pfg -c design.sof design.jic design.rpd \
-o hps_path=fsbl.hex \
-o device=MT25QU128 \
-o flash_loader=1SX280LU2 \
-o mode=ASX4 \
-o bitswap=on \
-o cvp=on
The input and output files for this command are:
  • Input Files
    • design.sof
    • fsbl.hex
  • Output Files:
    • design.periph.jic
    • design.core.rbf
    • design.rpd (optional)
    • (optional)
The command parameters are listed below:
Table 14.  Command Parameters
Parameter Description
hps_path Location of HPS FSBL file in hex format
device Target QSPI device. Use a device listed in Supported QSPI Devices or use the graphical interface to determine available options.
flash_loader Which helper image to be used for writing JIC to flash. It is typically a prefix of your FPGA part number. Use the graphical interface mode to determine available options.
mode ASX4 for QSPI
bitswap Set to "on" to create RPD with plain binary format, usable by 3rd party tools.
cvp Set to "on" to enable Configuration via Protocol.
Note: When using HPS boot first your JIC is small, and you can target a QSPI device that is smaller than what you have on board. When programming the resulted JIC file, a warning is displayed, but the resulted file size and erasing and programming times are reduced accordingly.

Did you find the information on this page useful?

Characters remaining:

Feedback Message