Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 1/14/2022
Public

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3.8.1.3. H2D Descriptor Status (h2ddm_desc_status)

The table below is the H2D Data Mover descriptor status sent to the external DMA controller when it completes the execution of a descriptor.

Note: This is intended to be used only when MM_mode=1 in original H2D Data Mover descriptor.
Table 26.  H2D Descriptor Status
Name Width Description
DESC_IDX1[15:0] 16

Unique Identifier for each descriptor. This is copied from original request.

App_specific_bits[18:16] 3

Application specific bits

Error[19] 1

Error Status [CISE to elaborate on error condition]

DESC_IDX2[31:20] 12

DESC_IDX2 copied from original request

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