Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 1/14/2022
Public

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5.1.3. Device Identification Registers

The following table lists the default values of the read-only registers in the PCI* Configuration Header Space. You can use the parameter editor to set the values of these registers.

You can specify Device ID registers for each Physical Function.

Table 56.  PCIe0 Device Identification Registers
Parameter Value Description

Vendor ID

0x00001172

Sets the read-only value of the Vendor ID register. This parameter cannot

be set to 0xFFFF per the PCI Express Base Specification.

Address offset: 0x000.

Device ID

0x00000000

Sets the read-only value of the Device ID register.

Address offset: 0x000.

Revision ID

0x00000001

Sets the read-only value of the Revision ID register.

Address offset: 0x008.

Class Code

0x00ff0000

Sets the read-only value of the Class Code register.

You must set this register to a non-zero value to ensure correct operation.

Address offset: 0x008.

Subsystem Vendor ID

0x00000000

Address offset: 0x02C.

Sets the read-only value of Subsystem Vendor ID register in the PCI Type 0 Configuration Space. This parameter cannot be set to 0xFFFF per the PCI Express Base Specification. This value is assigned by PCI-SIG to the device manufacturer. This value is only used in Root Port variants.

Subsystem Device ID

0x00000000

Sets the read-only value of the Subsystem Device ID register in the PCI Type 0 Configuration Space. This value is only used in Root Port variants. Address offset: 0x02C

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