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1. Intel® MAX® 10 High-Speed LVDS I/O Overview
2. Intel® MAX® 10 High-Speed LVDS Architecture and Features
3. Intel® MAX® 10 LVDS Transmitter Design
4. Intel® MAX® 10 LVDS Receiver Design
5. Intel® MAX® 10 LVDS Transmitter and Receiver Design
6. Intel® MAX® 10 High-Speed LVDS Board Design Considerations
7. Soft LVDS IP Core References
8. Intel® MAX® 10 High-Speed LVDS I/O User Guide Archives
9. Document Revision History for Intel® MAX® 10 High-Speed LVDS I/O User Guide
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3.4.1. Soft LVDS IP Core in Transmitter Mode
In the Intel® Quartus® Prime software, you can design your high-speed transmitter interfaces using the Soft LVDS IP core. This IP core uses the resources optimally in the Intel® MAX® 10 devices to create the high-speed I/O interfaces.
- You can use the Soft LVDS parameter editor to customize your serializer based on your design requirements.
- The high-speed I/O interface created using the Soft LVDS IP core always sends the most significant bit (MSB) of your parallel data first.
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