Intel® MAX® 10 High-Speed LVDS I/O User Guide

ID 683760
Date 10/02/2023
Public
Document Table of Contents

2.1. Intel® MAX® 10 LVDS Channels Support

The LVDS channels available vary among Intel® MAX® 10 devices. All I/O banks in Intel® MAX® 10 support true LVDS input buffers and emulated LVDS output buffers. However, only the bottom I/O banks support true LVDS output buffers.
Note: The 1.8 V LVDS buffers are supported as inputs on all high-speed I/O banks but as outputs only on the bottom banks. The low-speed and high-speed DDR3 I/O banks do not support 1.8 V LVDS. The 1.8 V LVDS I/O standard is supported in industrial- and commercial-grade Intel® MAX® 10 dual supply devices except in packages V36 and V81. Refer to the related information.
Table 2.   LVDS Buffers in Intel® MAX® 10 Devices This table lists the LVDS buffer support for I/O banks on each side of the devices.
Product Line Package Device Power Supply Side True LVDS Pairs 1 Emulated LVDS Pairs 2
TX RX
10M02 V36 Dual Top 0 1 1
Right 0 3 3
Left 0 3 3
Bottom 3 3 3
M153 Single Top 0 12 12
Right 0 12 12
Left 0 12 12
Bottom 9 13 13
U169 Single Top 0 12 12
Right 0 17 17
Left 0 15 15
Bottom 9 14 14
U324 Single Top 0 27 27
Right 0 31 31
Left 0 28 28
Bottom 15 28 28
Dual Top 0 13 13
Right 0 24 24
Left 0 20 20
Bottom 9 16 16
E144 Single Top 0 10 10
Right 0 12 12
Left 0 11 11
Bottom 7 12 12
10M04 M153 Single Top 0 12 12
Right 0 12 12
Left 0 12 12
Bottom 9 13 13
U169 Single Top 0 12 12
Right 0 17 17
Left 0 15 15
Bottom 9 14 14
U324 Single Top 0 27 27
Right 0 31 31
Left 0 28 28
Bottom 15 28 28
Dual Top 0 27 27
Right 0 31 31
Left 0 28 28
Bottom 15 28 28
F256 Dual Top 0 19 19
Right 0 22 22
Left 0 19 19
Bottom 13 20 20
E144 Single Top 0 8 8
Right 0 12 12
Left 0 11 11
Bottom 10 10 10
10M08 V81 Single Top 0 5 5
Right 0 7 7
Left 0 6 6
Bottom 7 7 7
Dual Top 0 5 5
Right 0 7 7
Left 0 6 6
Bottom 7 7 7
M153 Single Top 0 12 12
Right 0 12 12
Left 0 12 12
Bottom 9 13 13
U169 Single Top 0 12 12
Right 0 17 17
Left 0 15 15
Bottom 9 14 14
U324 Single Top 0 27 27
Right 0 31 31
Left 0 28 28
Bottom 15 28 28
Dual Top 0 27 27
Right 0 31 31
Left 0 28 28
Bottom 15 28 28
F256 Dual Top 0 19 19
Right 0 22 22
Left 0 19 19
Bottom 13 20 20
E144 Single Top 0 8 8
Right 0 12 12
Left 0 11 11
Bottom 10 10 10
F484 Dual Top 0 27 27
Right 0 33 33
Left 0 28 28
Bottom 15 28 28
10M16 U169 Single Top 0 12 12
Right 0 17 17
Left 0 15 15
Bottom 9 14 14
U324 Single Top 0 27 27
Right 0 31 31
Left 0 28 28
Bottom 15 28 28
Dual Top 0 27 27
Right 0 31 3 31
Left 0 28 28
Bottom 15 28 28
F256 Dual Top 0 19 19
Right 0 22 3 22
Left 0 19 19
Bottom 13 20 20
E144 Single Top 0 8 8
Right 0 12 12
Left 0 11 11
Bottom 10 10 10
F484 Dual Top 0 39 39
Right 0 38 3 38
Left 0 32 32
Bottom 22 42 42
Y180 Single Top 0 14 14
Right 0 13 13
Left 0 13 13
Bottom 10 13 13
10M25 F256 Dual Top 0 19 19
Right 0 22 3 22
Left 0 19 19
Bottom 13 20 20
E144 Single Top 0 8 8
Right 0 12 12
Left 0 11 11
Bottom 10 10 10
F484 Dual Top 0 41 41
Right 0 48 3 48
Left 0 36 36
Bottom 24 46 46
10M40 F256 Dual Top 0 19 19
Right 0 22 3 22
Left 0 19 19
Bottom 13 20 20
E144 Single Top 0 9 9
Right 0 12 12
Left 0 11 11
Bottom 10 10 10
F484 Dual Top 0 41 41
Right 0 48 3 48
Left 0 36 36
Bottom 24 46 46
F672 Dual Top 0 53 53
Right 0 70 3 70
Left 0 60 60
Bottom 30 58 58
10M50 F256 Dual Top 0 19 19
Right 0 22 3 22
Left 0 19 19
Bottom 13 20 20
E144 Single Top 0 9 9
Right 0 12 12
Left 0 11 11
Bottom 10 10 10
F484 Dual Top 0 41 41
Right 0 48 3 48
Left 0 36 36
Bottom 24 46 46
F672 Dual Top 0 53 53
Right 0 70 3 70
Left 0 60 60
Bottom 30 58 58
1 True LVDS pairs support 2.5 V and 1.8 V LVDS I/O standards.
2 Emulated LVDS pairs support only the 2.5 V LVDS I/O standard.
3 High-speed DDR3 I/O bank; supports only 2.5 V LVDS.