Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 4/01/2024
Public

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6.5. Avalon® Streaming Splitter Intel® FPGA IP

The Avalon® Streaming Splitter Intel® FPGA IP allows you to replicate transactions from an Avalon® streaming sink interface to multiple Avalon® streaming source interfaces. This IP supports from 1 to 16 outputs.

Figure 272.  Avalon® Streaming Splitter Intel® FPGA IP

The Avalon® Streaming Splitter IP copies input signals from the input interface to the corresponding output signals of each output interface without altering the size or functionality. This includes all signals except for the ready signal. The IP includes a clock signal to determine the Avalon® streaming interface and clock domain where the IP resides. Because the Avalon® Streaming Splitter IP does not use the clock signal internally, latency is not introduced when using this IP.